Port-Termination Compensation (PTC)

Conditional removal of declared solver or probe shunts in Y before interpreting a design-facing network observable.

Node role: Method.

Reader task: decide whether a known explicit port shunt may be removed from a raw admittance matrix, then perform that removal without changing retained physical loads.

Why it matters

Some circuit simulations include explicit probe or port resistors in the solved circuit. If those shunts are measurement scaffolding rather than part of the design, the raw \(Y\) and \(Z\) matrices describe the scaffolded circuit. Port-Termination Compensation (PTC) removes only the shunts that the input artifact proves are present and intended to be removed.

PTC is not another name for an \(S\)-parameter reference impedance, and it does not mean “make the trace look unloaded.” It is a declared network operation on known circuit admittances.

The site-wide naming rule is owned by Network Trace Views: unqualified \(\mathbf S\) has no implied PTC, while design-facing unqualified \(\mathbf Y\) and \(\mathbf Z\) are PTC-processed. Pre-compensation matrices must be labeled \(\mathbf Y^{\mathrm{raw}}\) or \(\mathbf Z^{\mathrm{raw}}\).

Method contract

The starting model is ordinary parallel-admittance addition. This page derives the subtraction by solving that sum for the desired network; it is not a new microwave wave definition. Power-wave references instead follow (Kurokawa 1965). The explicit shunt and removal intent are model facts that cannot be inferred from that reference impedance.

Contract Value
Operation Subtract verified artificial shunts from raw \(Y\).
Input Raw \(Y\), exact shunt rows and values, port ordering, and removal intent.
Boundary The shunts are present in the same compiled circuit and are scaffold for this observable.
Output \(Y_{\rm PTC}\) and any explicitly derived \(Z_{\rm PTC}\).
Why Recover the declared network while retaining its physical environment.

If the raw artifact can be decomposed as

\[ Y_{\mathrm{raw}}(\omega)=Y_{\mathrm{network}}(\omega)+D, \]

where \(D\) contains explicit shunt admittances, then compensating a selected set of resistive probe ports uses

\[ D_{ii}=\frac{1}{R_i}, \qquad Y_{\mathrm{PTC}}=Y_{\mathrm{raw}}-D. \]

When a design-facing impedance matrix is needed,

\[ Z_{\mathrm{PTC}}=Y_{\mathrm{PTC}}^{-1}. \]

The implementation should solve the matrix system rather than assume that every frequency point is safely invertible.

WarningEvidence required before subtraction

Subtracting \(1/R_i\) is valid only when the artifact or compiled circuit proves that the same \(R_i\) is an explicit parallel shunt in \(Y_{\mathrm{raw}}\). A wave reference used to convert \(S\leftrightarrow Y\) is not, by itself, proof that an equal physical shunt should be subtracted.

Two independent authorization gates

Why are presence and intent independent? A branch can be real but unwanted for one reported observable; the same branch can be a retained physical load for another. The following exact row checks preserve the earlier Workbench engineering contract. They are not the general PTC definition or a claim that all solvers use these row names. No new authorization Gate is introduced here.

PTC is authorized only after both gates pass:

  1. Compiled-presence gate. For every selected index \(i\), the compiled artifact contains exactly one P<i> row and one R_port_<i> row on the same grounded branch. The resistor row resolves through component_values to a finite positive value, and exactly one logical port maps to the same index.
  2. Design-removal gate. The workflow explicitly names why that shunt is scaffold for this observable. Presence proves what exists; it does not prove that the element should be removed.

The compensation input must be the raw \(Y\) matrix derived from the same solver result and in the same port basis and order as the compiled evidence. A caller resistance dictionary, port role, equal numerical \(Z_0\), or attractive notch shape satisfies neither gate.

Retained loads

After subtraction, use the result to inspect the declared network, not to claim that it has no environment. This page’s algebra also explains operation order: the shunt matrix must follow the same congruence as the network when coordinates change.

A physical environment or measurement load that belongs to the intended circuit remains in the matrix. “Compensated port” and “eliminated coordinate” are separate choices:

  • PTC removes a verified artificial shunt;
  • an admittance coordinate transform expresses the network in already-declared physical coordinates; and
  • Kron reduction sets the external current injection of eliminated coordinates to zero while retaining loads already present in the matrix.

PTC may be performed before a coordinate transform, or the compensation matrix may be transformed with \(Y\). Subtracting an untransformed diagonal matrix after changing basis is not equivalent.

A worked-system page must name the exact compiled scaffold, compensated ports, retained physical loads, resulting observable, and decisions that use it. Those device choices are not part of the general PTC definition.

  • Does the artifact identify the explicit shunt element and its resistance?
  • Does each port row share the exact grounded branch with its resistor row?
  • Does the raw matrix use the same port labels and basis as the compiled proof?
  • Is the selected shunt artificial for this design question?
  • Are physical loads that should remain excluded from compensation?
  • Is subtraction performed in \(Y\) or with an equivalently transformed shunt matrix?
  • Are port labels, order, frequency units, and solver provenance preserved?
  • Does \(Y_{\mathrm{PTC}}\rightarrow Z_{\mathrm{PTC}}\) fail visibly at singular points?
  • Is raw-versus-PTC comparison retained as evidence?

Failure modes

The method cannot recover a shunt that is not identifiable in the input, nor separate physical loading from scaffold without the declared observable. Subtraction is algebraically simple; those model distinctions are its limits.

  • Treating an \(S\)-parameter reference impedance as an explicit shunt double counts the port convention.
  • Subtracting a real physical load changes the circuit being evaluated.
  • Applying a diagonal compensation after a mode transform without transforming that matrix removes the wrong network terms.
  • A heuristic rescaling of trace entries is not PTC.
  • Supplying the expected resistance from configuration bypasses compiled evidence and is not authorization.
  • A plausible notch does not prove that the compensation contract was correct.

Connections

This retained engineering handoff record belongs to the earlier workflow; its exact field names are not a newly imposed schema on every simulator.

The exact matrix construction belongs to the simulation implementation, but the artifact must state:

Required field Meaning
Raw quantity Solver output used before compensation, including its matrix domain.
Proven shunt Exact P row, R_port row, shared branch, value reference, resolved resistance, logical port ID, and solver index.
Matrix binding Proof that the raw \(Y\) came from the same solver result and uses the evidenced port basis and order.
Removal intent Design-owned reason each proven shunt is scaffold for this observable.
Compensation set Exact ports whose verified shunts are removed; no implicit all-port default.
Retained loads Exact physical or environmental loads intentionally left in the network.
PTC quantity Reported compensated \(Y^{\mathrm{PTC}}\) and any derived \(Z^{\mathrm{PTC}}\).
Plot observable Which element is plotted, such as \(\operatorname{Im} Z_{21}^{\mathrm{PTC}}\).
Lineage Raw quantity, compensation operation, PTC quantity, solver, compiled artifact, frequency units, and matrix units.

The implementation observations below are preserved as historical evidence, not current package-capability certification or evidence of a new execution.

Field Value
Status Artifact-backed
Semantic role Define the conditional shunt-removal operation behind a reported PTC matrix.
Related topic Port Reference Impedance Semantics
Historical Workbench evidence The recorded shared helper rejects non-raw matrices and derives resistance only from exact compiled P/R_port branch evidence plus a logical port mapping. Its focused test covers unequal resistances and fail-fast evidence failures; Notebook 00 exercises the same helper against a real solver result.
Implementation links Compiler port lowering, compiler port test, shared PTC helper, helper tests, Notebook 00, and Notebook 02.
Historical implementation gap At the recorded snapshot, compiled evidence remains distributed across netlist, component_values, and port_map; PortMatrixStack carries no compiled-artifact identity, so current same-run binding is enforced by each call-site construction; current CSV traces do not yet persist the full authorization and raw-to-PTC lineage; and the Product Runner has no PTC producer. Product submission therefore rejects ptc.enabled=true instead of claiming availability.
Human review gate Can a reviewer point from one compiled artifact to every removed P row, R_port row, shared branch, resolved value, logical port, and explicit removal intent; name all retained loads; and reject a caller resistance dictionary or matching \(Z_0\) as authorization?

Bibliography

Kurokawa, K. 1965. “Power Waves and the Scattering Matrix.” IEEE Transactions on Microwave Theory and Techniques 13 (2): 194–202. https://doi.org/10.1109/TMTT.1965.1125964.